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Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
other:kicad_overview [2020/04/18 07:08] – formlab | other:kicad_overview [2020/09/11 04:55] (current) – [Part 2: Create a Schematic Symbol] formlab | ||
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* Board Layout (in the PCB Layout Editor) | * Board Layout (in the PCB Layout Editor) | ||
- | === Create a Schematic | + | === Create a new Symbol Library === |
- | === Create a new Library === | + | * In the Symbol Editor: '' |
- | * Open the Symbol Editor | + | |
- | * '' | + | |
* Save the .lib file local to your project (eg: projects folder) or available to multiple projects (eg: documents > KiCad > Libraries). | * Save the .lib file local to your project (eg: projects folder) or available to multiple projects (eg: documents > KiCad > Libraries). | ||
* Choose '' | * Choose '' | ||
+ | |||
=== Create a new Symbol === | === Create a new Symbol === | ||
- | * In the Symbol Editor, '' | + | * In the Symbol Editor: '' |
* Select the library you just created | * Select the library you just created | ||
- | * Give the symbol a name & Click OK | + | * Give the symbol a name & [[https:// |
+ | * // | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * Click '**Add pins**' | ||
+ | * //Pin conventions//: | ||
+ | * Pin names are in capitals | ||
+ | * Starting a pin name with '' | ||
+ | * Put pins 2 grid spaces apart for legibility. | ||
+ | * place all pins and orient them with the little circle on the outside. | ||
+ | * draw box (graphic rectangle icon) touching the straight ends of the pins. | ||
+ | * //Symbol conventions// | ||
+ | * Origin should be in the center | ||
+ | * The [[https:// | ||
+ | * The part name sits in the **bottom right** of the symbol box | ||
+ | * Save and close. | ||
+ | |||
+ | === Associate symbols to footprints === | ||
+ | **Annotate schematic** | ||
+ | * '' | ||
+ | * Click '' | ||
+ | |||
+ | **Assign footprints** | ||
+ | * '' | ||
+ | * click on the first component. Use the filter options at the top to narrow down the footprints in the right column. Take your time here. Make sure you'll select the right footprint for the symbol. | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * '' | ||
+ | * If you found a candidate in the right column, select it and press the 'view selected footprint' | ||
+ | * If it is the right component, '' | ||
+ | |||
+ | **Generate netlist** | ||
+ | * '' | ||
+ | |||
+ | === Design PCB === | ||
+ | * open PCB Layout Editor. | ||
+ | * Make sure the units are set to '' | ||
+ | * set Grid to 50 mils. | ||
+ | * '' | ||
+ | |||
+ | **set design rules** | ||
+ | Set following values according to PCB manufacturer. The values here are set by [Seeed Studio ](https:// | ||
+ | * '' | ||
+ | * Solder mask: '' | ||
+ | * '' | ||
+ | * Minimum track width: '' | ||
+ | * Minimum via diameter: '' | ||
+ | * Minimum via: '' | ||
+ | * '' | ||
+ | * Default class (for signal traces) | ||
+ | * Clearance: '' | ||
+ | * Track Width: '' | ||
+ | * dPair Width: '' | ||
+ | * dPair gap: '' | ||
+ | * Via size: '' | ||
+ | * Via Drill: '' | ||
+ | * Power class (for power and GND traces) | ||
+ | * Clearance: '' | ||
+ | * Track Width: '' | ||
+ | * dPair Width: '' | ||
+ | * dPair gap: '' | ||
+ | * Assign the right class for each net by selecting it in the drop down menu on the right of each item. | ||
+ | * click OK | ||
+ | * Read manufacturers specifications and panelization pages carefully. | ||
+ | |||
+ | |||
+ | |||
+ | **Part layout** | ||
+ | * move your parts to the locations you'd like them to be. Hover your mouse over a part and press '' | ||
+ | * Try to make the air-wire structure as simple as possible. (At least as possible crossovers). | ||
+ | * Using the 'route tracks' | ||
+ | * choose the layer (F.cu = front copper, B.cu = back copper) | ||
+ | * Use '' | ||
+ | * Keep space for fingers in mind when using connectors | ||
+ | * keep conductive things underneath the PCB in mind (for example: programming pins or the USB connector on a microcontroller). Make sure you don't get unwanted connections | ||
+ | * When layout is finalised perform a design rule check: '' | ||
+ | * Arrange the silkscreen elements to give info when the PCB is made. |